The TSN End Node IP core from NetTimeLogic is a standalone Time Sensitive Networking (TSN) single port end node core according to IEEE 802.1 and IEEE 1588 standards. It supports the same features ...

As of the Xilinx Vivado 2020.1 release, the MIPI DSI (display serial interface) and CSI (camera serial interface) IP blocks are now bundled with the IDE to be used freely with Xilinx FPGAs.

AMD said it has completed its $49 billion acquisition of Xilinx to create the “industry’s high-performance and adaptive computing leader,” marking the largest chip deal in history.

for setting up efficient Ethernet communication using RTE transformers and LDCOM. Arctic Core 11.0.0 has now support for several new boards: Freescale MPC5668G, Renesas RH850 F1L and the Xilinx Zynq ...

The TSN End Node IP core from NetTimeLogic is a standalone Time Sensitive Networking (TSN) single port end node core according to IEEE 802.1 and IEEE 1588 standards. It supports the same features ...