Design-Reuse23d
PCIe 2.0 End Point IP Core - PCIe with FIFO Interface
The Arasan PCI Express End Point is a high-speed, high-performance, and lowpowerIP core that is fully compliant to the PCI Express Specification 1.1 and 2.0. The IP core is designed for applications ...
Design-Reuse3y
PCI Express 3.0, 2.0, 1.1 Controller IP Core - Configurable
Rambus PCIe 3.0 Controller is a highly configurable PCIe 3.0 interface Soft IP designed for ASIC and FPGA implementations supporting endpoint, root port, switch, bridge and advanced features such as ...